Back in 2001, HART Specification version 6 defined Phase Shift Keying (PSK), an alternative to Frequency Shift Keying (FSK) that multiplied HART data communication rate from 1,200 bits per second (bps) to 9,600 bps. At the time, few end users or vendors noticed because, in general, HART applications ran fine at 1,200 bps. Why add more electronics, expense, and above all, energy consumption, considering the 4-20 mA loop limits available current to about 3.5 mA?
But time marches on. Instrument engineers added HART-accessible, smart self-diagnostics, additional sensor signals and calculated outputs such as mass flow, valve signatures and alarms. Configuration options increased, and control systems added remote configuration, calibration and instrument monitoring options. With the rise of computerized asset management, cloud connectivity and the Industrial Internet of Things (IIoT), many more applications have come looking for HART data, and 1,200 bps may be too slow for efficient configuration and data transfer.
Communication rates are one reason to look at alternative, all-digital protocols such as Ethernet. But while device vendors and users are interested in increasing speeds, many want to remain committed to the 4-20 mA paradigm. Ethernet may be fast, but it requires a different infrastructure. They consider HART to be well established, field proven and easy to use. Staffs are already trained to handle HART’s entire device life cycle. HART PSK is straightforward to implement on host systems and devices of all types, and the specification is written to make it back-compatible with 1,200 bps systems, and therefore dual speed.
But providing cost-effective, loop-powered PSK has been a challenge. “A 9,600 bps modem is easy, but powering it to meet HART specifications is not, because it all must be done with 3.5 mA or less in the 4-20 mA loop,” says Pran Haran, VP of engineering and chief technology officer, Smart Embedded Systems (SES). SES is one of the early pioneers in software-based HART modems.
[pullquote]“Five years ago, we were developing HART at 1,200 bps. Instead of separate chips for the stack and modem, we put both on one chip, with a soft modem on the device side and multiple modems on one chip on the host side,” says Baldev Krishan, president and CEO, SES. After manufacturing “the world’s first 1,200- and 9,600-bps, single-speed and dual-speed soft modems,” the company recently announced a Quad soft modem to address the needs of a host side connected to multiple I/O devices. The four-channel, 1,200-bps firmware operates in one Texas Instruments MSP 430 or I/O microcontroller. With 9,600 bps, HART data is delivered five to eight times faster than with traditional chip-based modems.
The system-on-a-chip reduces cost, power, and space requirements, so HART PSK can be added to existing housings and power supplies.
“It works with any third-party HART stack,” says Haran. “Its low-power, table lookup-based modulator and smart phase and timing detection of incoming signals use SES patented methods to minimize power consumption and lag time.”
SES’s HART 7.0 stack can run on the same microcontroller, offering a sensor interface and the ability to add MSP 430 hardware-based security.
In addition to the dual-speed modem, SES offers one-chip solution with four soft modems that can benefit HART I/O controllers and gateways. “Running multiple instances of the modem in one thread can minimize process overhead such as interrupt service routines, context save and restore, so the CPU utilization is optimized,” says Haran. “This can result in lower CPU speed and lower power consumption. It also provides room to run more instances with a given speed.”
Communication can be consolidated on one channel. “Implementing up to four firmware-based modems and the microcontroller on one chip reduces costs by as much as 50% compared to four modem chips,” says Krishan. “It also increases reliability due to a lower component count, saves circuit board space, and enables efficient use of system resources.”
